30 December 2016
any driver on the bus will always force the bus into the
dominant state. Logic 0s always override logic 1s. Figure 3
shows scope traces for the CANH and CANL signals on a
bus with two square wave signals applied to two drivers. A
logic 0 input sent to any bus driver input (D) forces the bus
into its dominant state. Only when both drivers receive a
logic 1 does the bus revert to the recessive state.
To operate properly and reduce signal reflections on a
CAN bus, always use a termination resistor — typically
120 ohms — at each end (Figure 4). In parallel, these
resistors closely match the bus-wire impedance of
about 60 ohms. You can create branches off a CAN
bus, but limit their length to a foot (0.3 m). As a rule,
the longer a CAN bus is, the lower its data rate. For
more information, see Note 1 in the sidebar. The scope
images shown previously use only test signals, not a
CAN formatted frame. Now, we leave the physical bus
and explore how CAN communications work.
Identify and Arbitrate
A CAN frame begins with a logic 0 start-of-frame
(SOF) bit followed by an 11-bit address that can
identify 2,048 unique CAN devices. Networks won’t
use that many devices, but each manufacturer of CAN
bus devices needs unique IDs for its products, so
several thousand addresses make sense. The address —
or identifier — also establishes a priority. Address 0 has
the highest priority; address 2047 has the lowest.
You know logic 0s on the bus dominate logic 1s,
so a logic 0 in an ID overrides a logic 1. Before a CAN
start to transmit a frame. What happens if two controllers
start to transmit at the exact same time?
Each controller continues to monitor the bus to ensure
its output matches what it detects on the bus. Consider the
example shown in Figure 5 when two devices start a frame
simultaneously. Both begin a frame with SOF signals (A)
and both detect a logic 0 from their respective receiver. So
far, so good; so they continue to transmit. Then, the
transmissions follow with a logic 1 most-significant ID bit
(B) followed by a logic 0 (C). Again, the transmissions have
no problems because the transmitted and detected bus
values match the bit value sent from each transmitter.
At point D, the CAN1 TX output transmits a logic 0
and detects a logic 0 on the bus. However, the CAN2
controller detects a logic 0 on the bus as it starts to
transmit a logic 1 (Figure 5, arrow). This mismatch causes
the CAN2 controller to stop transmission because the
CAN1 controller has started to transmit a higher priority
ID. We call this process CAN-bus arbitration. Keep in mind
the address — or ID — bits in the frame refer to the
identification for the recipient device, not the address of
the sending CAN controller.
Send the Data
Each CAN frame may include zero to eight bytes of
data you can use for any purpose you choose. Bytes could
include temperature values, actuator settings, switch-control bits, servo commands, and so on. This information
goes to all CAN devices, but only the one with an 11-bit
FIGURE 2. An example of a logic signal sent to an SN65HVD251
